The SISC is a workshop-style conference that provides a forum for device engineers, solid state physicists, and materials scientists to discuss topics of common interest, formally through invited and contributed presentations, and informally during poster and rump sessions.

The SISC is sponsored by the IEEE Electron Device Society and is held right after IEDM.

This year, SISC will be held as a fully in-person event.

The program includes talks and poster presentations (theory and experiment) on the role of materials, their interfaces, and defects on performance and reliability of:

• Logic Devices for future technology nodes (Nanosheet, CFET, VFET, etc.),
• Insulators on High-Mobility substrates (SiGe, Ge, etc.),
• Non-Volatile Memory for AI / In-Memory / Neuromorphic Compute (ReRAM, PCM, ECRAM, etc.),
• Wide Bandgap semiconductor power devices (SiC, GaN, β-Ga₂O₃, etc.),
• Ferroelectric devices (FeFET, FeRAM, etc.),
• Steep Sub-Threshold slope logic devices (Tunnel FETs, etc.),
• Low Dimensional materials and devices,
• Monolithic and/or Heterogeneous ICs (BEOL oxide transistors, interconnects, packaging, etc.),

including machine learning / materials discovery techniques developed and used for their study.

• Invited speakers and Wednesday evening Tutorial to be announced soon!

A Best Student Presentation Award will be given in memory of E. H. Nicollian, who made many important contributions to the field and had a strong presence within the SISC.

A Best Poster Award will be given in memory of T. P. Ma.

Abstract submission deadline: July 31, 2025

You can also download the Call in the PDF format. Please help us promote SISC among your colleagues and collaborators by forwarding the Call to them and by posting a hard copy at your affiliation.

For questions about the SISC focus, abstract submission, and related issues, please contact the Technical Program Chair.