56th IEEE Semiconductor Interface Specialists Conference
Bahia Resort Hotel, San Diego, CA
December 10 – 13, 2025 (Tutorial: Dec 10)

The SISC is a workshop-style conference that provides a forum for device engineers, solid state physicists, and materials scientists to discuss topics of common interest, formally through invited and contributed presentations, and informally during poster and rump sessions.

The SISC is sponsored by the IEEE Electron Device Society and is held right after IEDM.

This year, SISC will be held as a fully in-person event.

The program includes talks and poster presentations (theory and experiment) on the role of materials, their interfaces, and defects on performance and reliability of:

  • Logic Devices for future technology nodes (Nanosheet, CFET, VFET, etc.),
  • Insulators on High-Mobility substrates (SiGe, Ge, etc.),
  • Non-Volatile Memory for AI / In-Memory / Neuromorphic Compute (ReRAM, PCM, ECRAM, etc.),
  • Wide Bandgap semiconductor power devices (SiC, GaN, β-Ga2O3, etc.),
  • Ferroelectric devices (FeFET, FeRAM, etc.),
  • Steep Sub-Threshold slope logic devices (Tunnel FETs, etc.),
  • Low Dimensional materials and devices,
  • Monolithic and/or Heterogeneous ICs (BEOL oxide transistors, interconnects, packaging, etc.),

including machine learning / materials discovery techniques developed and used for their study.

2025 Technical Invited Talks

The technical program will be complemented by Invited Presentations from both industry and academia.

  • Dr. Alessandro Calderoni, Micron Technology Inc.
    NVDRAM/Ferroelectric technology
  • Prof. Andrew Kummel, U.C. San Diego
    Key Interface Chemistry and Engineering in Hybrid Bonding for 3D Packaging
  • Prof. Paul McIntyre, Stanford U.
    Structure-Property Relations in Indium Tungsten Oxide Semiconductors for BEOL-Compatible Transistor Channels
  • Dr. Brian Douglas Rummel, Sandia National Lab
    A self-consistent framework for wide-bandgap MOS CV analysis
  • Prof. Sayeef Salahuddin, U.C. Berkeley
    Is it possible to push down the supply voltage of CMOS to 300 mV?
  • Prof. Hitoshi Wakabayashi, Institute of Science Tokyo, Japan
    Gate stacks and underlaying dielectric film for 2D materials and devices
  • Dr. Ernest Wu, IBM (Retired)
    Decades of Research Later: What We Know and What We Do Not Know About Dielectric Breakdown

Wednesday Evening Tutorial

The Wed Tutorial will shed light on a single topic in depth, particularly benefiting students and newcomers to the field.

  • Prof. Anthony Yen, ASML
    Photolithography for Semiconductor Manufacturing: 65 Years and Going Strong

bullet

A Best Student Presentation Award will be given in memory of E. H. Nicollian, who made many important contributions to the field and had a strong presence within the SISC.

A Best Poster Award will be given in memory of T. P. Ma.

Abstract submission deadline: July 31, 2025

You can also download the Call in the PDF format. Please help us promote SISC among your colleagues and collaborators by forwarding the Call to them and by posting a hard copy at your affiliation.

For questions about the SISC focus, abstract submission, and related issues, please contact the Technical Program Chair.